1. Technical Field
This disclosure relates generally to computer processors, and more particularly to instruction fetching from an instruction cache.
2. Description of the Related Art
Modern processors typically include an instruction cache to expedite fetching of program instructions. Instruction data may be pre-fetched into the instruction cache to avoid the delay involved in retrieving instruction data from memory or from a larger cache in hierarchical cache implementations. Processors may execute instructions out of program order and often execute more than one instruction per cycle. Thus, a processor may fetch data corresponding to multiple instructions each cycle. For example, a “fetch group” which may correspond to instruction data stored in one or more instruction cache lines may, in some implementations, include 32 bytes (256 bits) of instruction data, corresponding to sixteen 16-bit instructions or eight 32-bit instructions.
Often, a processor will not actually use all instructions in a fetch group. For example, if there is a control transfer instruction in a fetch group, instructions in the fetch group after the control transfer instruction may not be executed. Branches, calls, returns, etc. are examples of control transfer instructions. Furthermore, the prevalence of taken branches is relatively high in many sequences of executed program instructions.